Current Issue : January - March Volume : 2020 Issue Number : 1 Articles : 5 Articles
This paper describes a fourth-order cascade-of-integrators with feedforward (CIFF)\nsingle-bit discrete-time (DT) switched-capacitor (SC) delta-sigma modulator (DSM) for high-resolution\napplications. This DSM is suitable for high-resolution applications at low frequency using a high-order\nmodulator structure. The proposed operational transconductance amplifier (OTA), used a feedforward\namplifier scheme that provided a high-power efficiency, a wider bandwidth, and a higher DC gain\ncompared to recent designs. A chopper-stabilization technique was applied to the first integrator to\nremove the 1/f noise from the transistor, which is inversely proportional to the frequency. The designed\nDSM was implemented using 0.35 micromcomplementary metal oxide semiconductor (CMOS) technology.\nThe oversampling ratio (OSR) was 128, and the sampling frequency was 128 kHz. At a 500 Hz\nbandwidth, the signal-to-noise ratio (SNR) was 100.3 dB, the signal-to-noise distortion ratio (SNDR)\nwas 98.5 dB, and the dynamic range (DR) was 103 dB. The measured total power dissipation was\n99 microW from a 3.3 V supply voltage....
This paper proposes a 16 bit subthreshold adder design using bootstrapped sense\namplifier-based pass transistor logic (bootstrapped SAPTL) to overcome serious performance\ndegradation and enhance the immunity to process variations in the subthreshold region.\nThrough employing a bootstrapped sense amplifier including a voltage boosting part and adopting\nan adder architecture based on bootstrapped SAPTL, significant improvements in performance\nand energy efficiency can be achieved. A case study of 16 bit adders in SMIC 130 nm technology\ndemonstrated that the proposed adder outperformed other works in terms of performance, energy\nconsumption, and energy efficiency. Furthermore, the statistical results of the Monte Carlo analysis\nproved the proposed adderâ??s significant enhancement of robustness against process and temperature\nvariations. At 0.3 V (TT corner, 25 DegreeC), the proposed 16 bit adder achieved improvements of 72% in\nperformance and 8% in energy savings, as well as a 74% reduction in energy-delay production as\ncompared with the current design....
Poly-crystalline silicon channel transistors have been used as a display TFT for a long time\nand have recently been used in a 3D vertical NAND Flash which is a transistor with 2D plane NAND\nupright. In addition, multi-gate transistors such as FinFETs and a gate-all-around (GAA) structure has\nbeen used to suppress the short-channel effects for logic/analog and memory applications. Compact\nmodels for poly-crystalline silicon (poly-silicon) channel planar TFTs and single crystalline silicon\nchannel GAA MOSFETs have been developed separately, however, there are few models consider\nthese two physics at the same time. In this work, we derived new analytical current-voltage model\nfor GAA transistor with poly-silicon channel by considering the cylindrical coordinates and the grain\nboundary effect. Based on the derived formula, the compact I-V model for various operating regions\nand threshold voltage was proposed for the first time. The proposed model was compared with the\nmeasured data and good agreements were observed....
This paper presents the development of a hardware simulator based on the junctiontemperature\nof insulated-gate bipolar transistor (IGBT) modules in modular multilevel converters\n(MMCs). The MMC consists of various power-electronics components, and the IGBT is the main\nfactor determining the lifetime of the MMC. The failure of IGBTs is mostly due to the junctiontemperature\nswing; thus, the thermal profile of the IGBT should be established to predict the\nlifetime. The thermal behavior depends on the current flowing to the IGBT, and the load-current\nprofile is related to the application. To establish the thermal profile of the IGBT, the proposed\nhardware simulator generates various shapes of output currents while the junction temperature is\nmeasured. Additionally, a controller design is presented for simulation of the arm current, which\nincludes a direct current component as well as an alternative current component with a fundamental\nfrequency. The validity and performance of the proposed hardware simulator and its control\nmethods are analyzed according to various experimental results....
Active filter design is a mature topic that provides good solutions that can be implemented\nusing discrete devices or integrated circuit technology. For instance, when the filter topologies are\nimplemented using commercially available operational amplifiers (opamps), one can explore varying\ncircuit parameters to tune the central freQuency or enhance the Quality (Q) factor. We show the\naddition of a feedback loop in the signal flow graph of a biQuadratic filter topology, which enhances\nQ and highlights that a sensitivity analysis can be performed to identify which circuit elements\ninfluence central freQuency, Q, or both. In this manner, we show the opamp-based implementation of\na biQuadratic bandpass filter, in which Q is enhanced through performing a sensitivity analysis for\neach circuit element. EQuations for the central freQuency and Q are provided to observe that there\nis not a direct parameter that enhances them, but we show that from sensitivity analysis one can\nidentify the circuit elements that better enhance Q-factor....
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